Read Inside the Machine: An Illustrated Introduction to Microprocessors and Computer Architecture for Free Online Page B

the data that the code stream needs (and we’ll talk about where the rest of that data lives shortly).
    Basic Computing Concepts
    7
    Building on our previous, three-step description of what goes on when a
    computer’s ALU is commanded to add two numbers, we can modify it as
    follows. To execute an add instruction, the ALU must perform these steps:
    1.
    Obtain the two numbers to be added (the input operands ) from two
    source registers .
    2.
    Add the numbers.
    3.
    Place the results back in a destination register .
    For a concrete example, let’s look at addition on a simple computer
    with only four registers, named A, B, C, and D. Suppose each of these registers
    contains a number, and we want to add the contents of two registers together
    and overwrite the contents of a third register with the resulting sum, as in the following operation:
    Code
    Comments
    A + B = C
    Add the contents of registers A and B, and place the result in C, overwriting
    whatever was there.
    Upon receiving an instruction commanding it to perform this addition
    operation, the ALU in our simple computer would carry out the following
    three familiar steps:
    1.
    Read the contents of registers A and B.
    2.
    Add the contents of A and B.
    3.
    Write the result to register C.
    NOTE
    You should recognize these three steps as a more specific form of the read-modify-write sequence from earlier, where the generic modify step is replaced with an addition operation.
    This three-step sequence is quite simple, but it’s at the very core of how
    a microprocessor really works. In fact, if you glance ahead to Chapter 10’s
    discussion of the PowerPC 970’s pipeline, you’ll see that it actually has
    separate stages for each of these three operations: stage 12 is the register
    read step, stage 13 is the actual execute step, and stage 14 is the write-back
    step. (Don’t worry if you don’t know what a pipeline is, because that’s a topic
    for Chapter 3.) So the 970’s ALU reads two operands from the register file,
    adds them together, and writes the sum back to the register file. If we were
    to stop our discussion right here, you’d already understand the three core
    stages of the 970’s main integer pipeline—all the other stages are either just
    preparation to get to this point or they’re cleanup work after it.
    RAM: When Registers Alone Won’t Cut It
    Obviously, four (or even eight) registers aren’t even close to the theoretically infinite storage space I mentioned earlier in this chapter. In order to make a
    viable computer that does useful work, you need to be able to store very large
    8
    Chapter 1
    data sets. This is where the computer’s main memory comes in. Main memory, which in modern computers is always some type of random access memory (RAM) , stores the data set on which the computer operates, and only a small portion
    of that data set at a time is moved to the registers for easy access from the
    ALU (as shown in Figure 1-4).
    Main Memory
    Registers
    ALU
    CPU
    Figure 1-4: A computer with a register file
    Figure 1-4 gives only the slightest indication of it, but main memory is
    situated quite a bit farther away from the ALU than are the registers. In fact,
    the ALU and the registers are internal parts of the microprocessor, but main
    memory is a completely separate component of the computer system that is
    connected to the processor via the memory bus . Transferring data between main memory and the registers via the memory bus takes a significant
    amount of time. Thus, if there were no registers and the ALU had to read
    data directly from main memory for each calculation, computers would run
    very slowly. However, because the registers enable the computer to store data
    near the ALU, where it can be accessed nearly instantaneously, the computer’s
    computational speed is decoupled somewhat from the speed of main memory.
    (We’ll discuss the problem of memory access speeds and computational
    performance in more detail in Chapter 11, when we